Ethernut 3.0 Rev-D
In July 2006 this board was replaced by Ethernut 3.0 Rev-E.
4-layer board with AT91R40008 running at 73.728 MHz, 100 MBit Davicom Ethernet Controller, 256 kBytes full speed SRAM and 4 MBytes FLASH memory.
- By default the DM9000E uses a push-pull output for IOWAIT, which blocks the CPLD from pulling this line low. This problem will be addressed in a new Board Revision E.
To fix a few problems of the board layout, minor modifications are required when mounting the board.
- Pin 60 of IC2 (DM9000E) connected to pin 61. Now the link LED is lit at 10 and 100 MBit connections.
- Pin 4 of IC8 (LT1616) connected to pin 5.
- R7 and R8 not mounted. R107 and R108 mounted. This enables the green LED for the link indicator, while the activity LED remains yellow.
- Switching on the board activates the internal pull-ups in the CPLD, which overrides the weak internal pull-down in the Ethernet Controller at pin 79. This enables the 8-bit data bus mode. An additional pull-down of 10k had been added to force the Ethernet Controller into 16-bit mode.
Ethernut 3.0 Rev-D Hardware User's Manual
including all schematics.
Ethernut 3 Memory Map
Ethernut 3 memory layout.
Ethernut 3 CPLD
A detailed description of the CPLD registers.
Eagle 4.11 schematic and board file.
Nut/OS on Ethernut 3
How to install Nut/OS with a cross compiler and try a few sample applications on Ethernut 3.
Introduction to Ethernut 3 JTAG programming. Additionally describes how to restore the TFTP Boot Loader.
OpenOCD and Ethernut 3
How to use OpenOCD with Ethernut 3 and Turtelizer 2.
Booting Ethernut 3
explains in detail how to get your Ethernut 3 application running after power-up.
How to upgrade the CPLD logic. It explains how to build and upload a new contents for the CPLD easily within seconds and without any special programming adapter.
An introduction to the programmable clock chip used on Ethernut 3.0 Rev-D and Rev-E.
An introduction to the realtime clock and calendar chip used on Ethernut 3.