Nut/OS  4.10.3
API Reference
ih_at91sys.c
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00001 /*
00002  * Copyright (C) 2007 by egnite Software GmbH. All rights reserved.
00003  *
00004  * Redistribution and use in source and binary forms, with or without
00005  * modification, are permitted provided that the following conditions
00006  * are met:
00007  *
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the copyright holders nor the names of
00014  *    contributors may be used to endorse or promote products derived
00015  *    from this software without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
00018  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00019  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00020  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
00021  * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00022  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00023  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
00024  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
00025  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00026  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
00027  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * For additional information see http://www.ethernut.de/
00031  *
00032  */
00033 
00034 /*
00035  * $Log$
00036  * Revision 1.2  2008/08/11 06:59:11  haraldkipp
00037  * BSD types replaced by stdint types (feature request #1282721).
00038  *
00039  * Revision 1.1  2007/02/15 16:11:14  haraldkipp
00040  * Support for system controller interrupts added.
00041  *
00042  */
00043 
00044 #include <arch/arm.h>
00045 #include <dev/irqreg.h>
00046 
00047 #ifndef NUT_IRQPRI_SYS
00048 #define NUT_IRQPRI_SYS  0
00049 #endif
00050 
00051 SYSIRQ_HANDLER syssig_DBGU;
00052 SYSIRQ_HANDLER syssig_MC;
00053 SYSIRQ_HANDLER syssig_PIT;
00054 SYSIRQ_HANDLER syssig_PMC;
00055 SYSIRQ_HANDLER syssig_RSTC;
00056 SYSIRQ_HANDLER syssig_RTT;
00057 SYSIRQ_HANDLER syssig_WDT;
00058 
00059 
00060 static int SystemIrqCtl(int cmd, void *param);
00061 
00062 IRQ_HANDLER sig_SYS = {
00063 #ifdef NUT_PERFMON
00064     0,                  /* Interrupt counter, ir_count. */
00065 #endif
00066     NULL,               /* Passed argument, ir_arg. */
00067     NULL,               /* Handler subroutine, ir_handler. */
00068     SystemIrqCtl /* Interrupt control, ir_ctl. */
00069 };
00070 
00074 static void SystemIrqEntry(void) __attribute__ ((naked));
00075 void SystemIrqEntry(void)
00076 {
00077     IRQ_ENTRY();
00078 #ifdef NUT_PERFMON
00079     sig_SYS.ir_count++;
00080 #endif
00081     if (syssig_DBGU.sir_enabled && syssig_DBGU.sir_handler) {
00082         /* Call debug unit interrupt handler. */
00083         (syssig_DBGU.sir_handler) (syssig_DBGU.sir_arg);
00084     }
00085     if (syssig_MC.sir_enabled && syssig_MC.sir_handler) {
00086         /* Call memory controller interrupt handler. */
00087         (syssig_MC.sir_handler) (syssig_MC.sir_arg);
00088     }
00089     if (syssig_PMC.sir_enabled && syssig_PMC.sir_handler) {
00090         /* Call power management controller interrupt handler. */
00091         (syssig_PMC.sir_handler) (syssig_PMC.sir_arg);
00092     }
00093     if (syssig_RSTC.sir_enabled && syssig_RSTC.sir_handler) {
00094         /* Call reset controller interrupt handler. */
00095         (syssig_RSTC.sir_handler) (syssig_RSTC.sir_arg);
00096     }
00097     if (syssig_RTT.sir_enabled && syssig_RTT.sir_handler) {
00098         /* Call real-time timer interrupt handler. */
00099         (syssig_RTT.sir_handler) (syssig_RTT.sir_arg);
00100     }
00101     if (syssig_WDT.sir_enabled && syssig_WDT.sir_handler) {
00102         /* Call watchdog timer interrupt handler. */
00103         (syssig_WDT.sir_handler) (syssig_WDT.sir_arg);
00104     }
00105     if ((inr(PIT_MR) & PIT_PITIEN) != 0 && (inr(PIT_SR) & PIT_PITS) != 0) {
00106         if (syssig_PIT.sir_handler) {
00107             /* Call periodic interval timer interrupt handler. */
00108             (syssig_PIT.sir_handler) (syssig_PIT.sir_arg);
00109         }
00110         inr(PIT_PIVR);
00111     }
00112     IRQ_EXIT();
00113 }
00114 
00130 static int SystemIrqCtl(int cmd, void *param)
00131 {
00132     int rc = 0;
00133     unsigned int *ival = (unsigned int *)param;
00134     int_fast8_t enabled = inr(AIC_IMR) & _BV(SYSC_ID);
00135 
00136     /* Disable interrupt. */
00137     if (enabled) {
00138         outr(AIC_IDCR, _BV(SYSC_ID));
00139     }
00140 
00141     switch(cmd) {
00142     case NUT_IRQCTL_INIT:
00143         /* Set the vector. */
00144         outr(AIC_SVR(SYSC_ID), (unsigned int)SystemIrqEntry);
00145         /* Initialize to level triggered with defined priority. */
00146         outr(AIC_SMR(SYSC_ID), AIC_SRCTYPE_INT_LEVEL_SENSITIVE | NUT_IRQPRI_SYS);
00147         /* Clear interrupt */
00148         outr(AIC_ICCR, _BV(SYSC_ID));
00149         break;
00150     case NUT_IRQCTL_STATUS:
00151         if (enabled) {
00152             *ival |= 1;
00153         }
00154         else {
00155             *ival &= ~1;
00156         }
00157         break;
00158     case NUT_IRQCTL_ENABLE:
00159         enabled = 1;
00160         break;
00161     case NUT_IRQCTL_DISABLE:
00162         enabled = 0;
00163         break;
00164     case NUT_IRQCTL_GETPRIO:
00165         *ival = inr(AIC_SMR(SYSC_ID)) & AIC_PRIOR;
00166         break;
00167     case NUT_IRQCTL_SETPRIO:
00168         outr(AIC_SMR(SYSC_ID), (inr(AIC_SMR(SYSC_ID)) & ~AIC_PRIOR) | *ival);
00169         break;
00170 #ifdef NUT_PERFMON
00171     case NUT_IRQCTL_GETCOUNT:
00172         *ival = (unsigned int)sig_SYS.ir_count;
00173         sig_SYS.ir_count = 0;
00174         break;
00175 #endif
00176     default:
00177         rc = -1;
00178         break;
00179     }
00180 
00181     /* Enable interrupt. */
00182     if (enabled) {
00183         outr(AIC_IECR, _BV(SYSC_ID));
00184     }
00185     return rc;
00186 }
00187 
00195 int NutSysIrqEnable(SYSIRQ_HANDLER * sysirq)
00196 {
00197     sysirq->sir_enabled = 1;
00198 
00199     return SystemIrqCtl(NUT_IRQCTL_ENABLE, NULL);
00200 }
00201 
00209 int NutSysIrqDisable(SYSIRQ_HANDLER * sysirq)
00210 {
00211     sysirq->sir_enabled = 0;
00212 
00213     return 0;
00214 }
00215 
00235 int NutRegisterSysIrqHandler(SYSIRQ_HANDLER * sysirq, void (*handler) (void *), void *arg)
00236 {
00237     int rc;
00238 
00239     /* Disable any previously registered handler. */
00240     NutSysIrqDisable(sysirq);
00241 
00242     /* Initialize this interrupt. */
00243     rc = SystemIrqCtl(NUT_IRQCTL_INIT, NULL);
00244 
00245     if (rc == 0) {
00246         /* Set the interrupt handler. */
00247         sysirq->sir_arg = arg;
00248         sysirq->sir_handler = handler;
00249     }
00250     return rc;
00251 }