lpc17xx_gpdma.c File Reference

#include <inttypes.h>
#include <cfg/arch.h>
#include <arch/cm3.h>
#include <arch/cm3/nxp/lpc17xx_gpdma.h>

Include dependency graph for lpc17xx_gpdma.c:

Functions
void	Lpc17xxGPDMA_Init (void)
	Initialize GPDMA controller.
int	Lpc17xxGPDMA_Setup (gpdma_channel_cfg_t *ch_config)
	Setup GPDMA channel.
void	Lpc17xxGPDMA_ChannelCmd (uint8_t ch, int enabled)
	Enable/Disable DMA channel.
int	Lpc17xxGPDMA_IntGetStatus (gpdma_status_t type, uint8_t ch)
	Check interrupt status.
void	Lpc17xxGPDMA_ClearIntPending (gpdma_state_clear_t type, uint8_t ch)
	Clear one or more interrupt requests on DMA channels.
Variables
volatile const void *	GPDMA_LUTPerAddr []
	Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.
const LPC_GPDMACH_TypeDef *	pGPDMACh [8]
	Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.
const uint8_t	GPDMA_LUTPerBurst []
	Optimized Peripheral Source and Destination burst size.
const uint8_t	GPDMA_LUTPerWid []
	Optimized Peripheral Source and Destination transfer width.

---

Function Documentation

void Lpc17xxGPDMA_Init

(

void

)

Initialize GPDMA controller.

Parameters:

none

Returns:

none

References CLKPWR_PCONP_PCGPDMA, LPC_GPDMA, LPC_GPDMACH0, LPC_GPDMACH1, LPC_GPDMACH2, LPC_GPDMACH3, LPC_GPDMACH4, LPC_GPDMACH5, LPC_GPDMACH6, LPC_GPDMACH7, and SysCtlPeripheralClkEnable.

int Lpc17xxGPDMA_Setup

(

gpdma_channel_cfg_t *

ch_config

)

Setup GPDMA channel.

Setup GPDMA channel peripheral according to the specified parameters in the ch_config.

Parameters:

ch_config

Pointer to a gpdma_channel_cfg_t structure that contains the configuration information for the specified GPDMA channel peripheral.

Returns:

0 on success, -1 in case of an error

References LPC_GPDMACH_TypeDef::CConfig, LPC_GPDMACH_TypeDef::CControl, LPC_GPDMACH_TypeDef::CDestAddr, gpdma_channel_cfg_t::ch, LPC_GPDMACH_TypeDef::CLLI, LPC_GPDMACH_TypeDef::CSrcAddr, gpdma_channel_cfg_t::dma_lli, gpdma_channel_cfg_t::dst_addr, gpdma_channel_cfg_t::dst_conn, GPDMA_BSIZE_32, GPDMA_DMACConfig_E, GPDMA_DMACCxConfig_DestPeripheral, GPDMA_DMACCxConfig_IE, GPDMA_DMACCxConfig_ITC, GPDMA_DMACCxConfig_SrcPeripheral, GPDMA_DMACCxConfig_TransferType, GPDMA_DMACCxControl_DBSize, GPDMA_DMACCxControl_DI, GPDMA_DMACCxControl_DWidth, GPDMA_DMACCxControl_I, GPDMA_DMACCxControl_SBSize, GPDMA_DMACCxControl_SI, GPDMA_DMACCxControl_SWidth, GPDMA_DMACCxControl_TransferSize, GPDMA_DMACEnbldChns_Ch, GPDMA_DMACIntErrClr_Ch, GPDMA_DMACIntTCClear_Ch, GPDMA_LUTPerAddr, GPDMA_TRANSFERTYPE_M2M, GPDMA_TRANSFERTYPE_M2P, GPDMA_TRANSFERTYPE_M2P_DEST_CTRL, GPDMA_TRANSFERTYPE_P2M, GPDMA_TRANSFERTYPE_P2M_SRC_CTRL, GPDMA_TRANSFERTYPE_P2P, LPC_GPDMA, LPC_SC, gpdma_channel_cfg_t::src_addr, gpdma_channel_cfg_t::src_conn, gpdma_channel_cfg_t::transfer_size, gpdma_channel_cfg_t::transfer_type, and gpdma_channel_cfg_t::transfer_width.

void Lpc17xxGPDMA_ChannelCmd	(	uint8_t	ch,
		int	enabled
	)

Enable/Disable DMA channel.

Setup GPDMA channel peripheral according to the specified parameters in the ch_config.

Parameters:

ch	GPDMA channel, should be in range from 0 to 7
enabled	New state of this channel: 1: enabled, 0: disabled

Returns:

none

References LPC_GPDMACH_TypeDef::CConfig, and GPDMA_DMACCxConfig_E.

int Lpc17xxGPDMA_IntGetStatus	(	gpdma_status_t	type,
		uint8_t	ch
	)

Check interrupt status.

Check if corresponding channel does have an active interrupt request or not

Parameters:

type	type of status, should be: GPDMA_STAT_INT: GPDMA Interrupt Status GPDMA_STAT_INTTC: GPDMA Interrupt Terminal Count Request Status GPDMA_STAT_INTERR: GPDMA Interrupt Error Status GPDMA_STAT_RAWINTTC: GPDMA Raw Interrupt Terminal Count Status GPDMA_STAT_RAWINTERR: GPDMA Raw Error Interrupt Status GPDMA_STAT_ENABLED_CH:GPDMA Enabled Channel Status
ch	GPDMA channel, should be in range from 0 to 7

Returns:

status of DMA channel interrupt after masking 1: the corresponding channel has no active interrupt request 0: the corresponding channel does have an active interrupt request

References GPDMA_DMACEnbldChns_Ch, GPDMA_DMACIntStat_Ch, GPDMA_DMACIntTCClear_Ch, GPDMA_DMACIntTCStat_Ch, GPDMA_DMACRawIntErrStat_Ch, GPDMA_DMACRawIntTCStat_Ch, GPDMA_STAT_INT, GPDMA_STAT_INTERR, GPDMA_STAT_INTTC, GPDMA_STAT_RAWINTERR, GPDMA_STAT_RAWINTTC, and LPC_GPDMA.

void Lpc17xxGPDMA_ClearIntPending	(	gpdma_state_clear_t	type,
		uint8_t	ch
	)

Clear one or more interrupt requests on DMA channels.

Parameters:

type	type of status, should be: GPDMA_STATCLR_INTTC: GPDMA Interrupt Terminal Count Request Clear GPDMA_STATCLR_INTERR: GPDMA Interrupt Error Clear
ch	GPDMA channel, should be in range from 0 to 7

Returns:

none

References GPDMA_DMACIntErrClr_Ch, GPDMA_DMACIntTCClear_Ch, GPDMA_STATCLR_INTTC, and LPC_GPDMA.

---

Variable Documentation

volatile const void* GPDMA_LUTPerAddr[]

Initial value:

 {
        0,                              
        (&LPC_MCI->FIFO),               
        (&LPC_SSP0->DR),                
        (&LPC_SSP0->DR),                
        (&LPC_SSP1->DR),                
        (&LPC_SSP1->DR),                
        (&LPC_SSP2->DR),                
        (&LPC_SSP2->DR),                
        (&LPC_ADC->GDR),                
        (&LPC_DAC->CR),                 
        (&LPC_UART0->THR),              
        (&LPC_UART0->RBR),              
        (&LPC_UART1->THR),              
        (&LPC_UART1->RBR),              
        (&LPC_UART2->THR),              
        (&LPC_UART2->RBR),              
        (&LPC_TIM0->MR0),               
        (&LPC_TIM0->MR1),               
        (&LPC_TIM1->MR0),               
        (&LPC_TIM1->MR1),               
        (&LPC_TIM2->MR0),               
        (&LPC_TIM2->MR1),               
        (&LPC_I2S->TXFIFO),             
        (&LPC_I2S->RXFIFO),             
        0,                              
        0,                              
        (&LPC_UART3->THR),              
        (&LPC_UART3->RBR),              
        (&LPC_UART4->THR),              
        (&LPC_UART4->RBR),              
        (&LPC_TIM3->MR0),               
        (&LPC_TIM3->MR1),               
}

Lookup Table of Connection Type matched with Peripheral Data (FIFO) register base address.

Referenced by Lpc17xxGPDMA_Setup().

const LPC_GPDMACH_TypeDef* pGPDMACh[8]

Initial value:

 {
        LPC_GPDMACH0,                   
        LPC_GPDMACH1,                   
        LPC_GPDMACH2,                   
        LPC_GPDMACH3,                   
        LPC_GPDMACH4,                   
        LPC_GPDMACH5,                   
        LPC_GPDMACH6,                   
        LPC_GPDMACH7,                   
}

Lookup Table of GPDMA Channel Number matched with GPDMA channel pointer.

const uint8_t GPDMA_LUTPerBurst[]

Initial value:

 {
        0,                              
        GPDMA_BSIZE_8,                  
        GPDMA_BSIZE_4,                  
        GPDMA_BSIZE_4,                  
        GPDMA_BSIZE_4,                  
        GPDMA_BSIZE_4,                  
        GPDMA_BSIZE_4,                  
        GPDMA_BSIZE_4,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_32,                 
        GPDMA_BSIZE_32,                 
        0,                              
        0,                              
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
        GPDMA_BSIZE_1,                  
}

Optimized Peripheral Source and Destination burst size.

const uint8_t GPDMA_LUTPerWid[]

Initial value:

 {
        0,                              
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
        0,                              
        0,                              
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_BYTE,               
        GPDMA_WIDTH_WORD,               
        GPDMA_WIDTH_WORD,               
}

Optimized Peripheral Source and Destination transfer width.