#include <cfg/os.h>
#include <arch/arm.h>
#include <string.h>
#include <sys/atom.h>
#include <sys/heap.h>
#include <sys/thread.h>
#include <sys/event.h>
#include <sys/timer.h>
#include <sys/confnet.h>
#include <netinet/if_ether.h>
#include <net/ether.h>
#include <net/if_var.h>
#include <dev/irqreg.h>
#include <dev/at91sam7x_emac.h>
#include <stdio.h>

Include dependency graph for at91sam7x_emac.c:

Data Structures
struct	_EMACINFO
	Network interface controller information structure. More...
struct	_BufDescriptor
Defines
#define	NUT_THREAD_NICRXSTACK 768
#define	EMAC_RX_BUFFERS 32
#define	EMAC_RX_BUFSIZ 128
#define	EMAC_TX_BUFFERS 2
#define	EMAC_TX_BUFSIZ 1536
#define	NIC_PHY_ADDR 31
#define	NIC_PHY_BMCR 0x00
	Basic mode control register.
#define	NIC_PHY_BMCR_COLTEST 0x0080
	Collision test.
#define	NIC_PHY_BMCR_FDUPLEX 0x0100
	Full duplex mode.
#define	NIC_PHY_BMCR_ANEGSTART 0x0200
	Restart auto negotiation.
#define	NIC_PHY_BMCR_ISOLATE 0x0400
	Isolate from MII.
#define	NIC_PHY_BMCR_PWRDN 0x0800
	Power-down.
#define	NIC_PHY_BMCR_ANEGENA 0x1000
	Enable auto negotiation.
#define	NIC_PHY_BMCR_100MBPS 0x2000
	Select 100 Mbps.
#define	NIC_PHY_BMCR_LOOPBACK 0x4000
	Enable loopback mode.
#define	NIC_PHY_BMCR_RESET 0x8000
	Software reset.
#define	NIC_PHY_BMSR 0x01
	Basic mode status register.
#define	NIC_PHY_BMSR_ANCOMPL 0x0020
	Auto negotiation complete.
#define	NIC_PHY_BMSR_LINKSTAT 0x0004
	Link status.
#define	NIC_PHY_ID1 0x02
	PHY identifier register 1.
#define	NIC_PHY_ID2 0x03
	PHY identifier register 2.
#define	NIC_PHY_ANAR 0x04
	Auto negotiation advertisement register.
#define	NIC_PHY_ANLPAR 0x05
	Auto negotiation link partner availability register.
#define	NIC_PHY_ANER 0x06
	Auto negotiation expansion register.
#define	PHY_TXCLK_ISOLATE_BIT 0
#define	PHY_REFCLK_XT2_BIT 0
#define	PHY_TXEN_BIT 1
#define	PHY_TXD0_BIT 2
#define	PHY_TXD1_BIT 3
#define	PHY_CRS_AD4_BIT 4
#define	PHY_RXD0_AD0_BIT 5
#define	PHY_RXD1_AD1_BIT 6
#define	PHY_RXER_RXD4_RPTR_BIT 7
#define	PHY_MDC_BIT 8
#define	PHY_MDIO_BIT 9
#define	PHY_TXD2_BIT 10
#define	PHY_TXD3_BIT 11
#define	PHY_TXER_TXD4_BIT 12
#define	PHY_RXD2_AD2_BIT 13
#define	PHY_RXD3_AD3_BIT 14
#define	PHY_RXDV_TESTMODE_BIT 15
#define	PHY_COL_RMII_BIT 16
#define	PHY_RXCLK_10BTSER_BIT 17
#define	PHY_PWRDN_BIT 18
#define	PHY_MDINTR_BIT 26
#define	PHY_MII_PINS
#define	RXBUF_OWNERSHIP 0x00000001
#define	RXBUF_WRAP 0x00000002
#define	RXBUF_ADDRMASK 0xFFFFFFFC
#define	RXS_BROADCAST_ADDR 0x80000000
	Broadcast address detected.
#define	RXS_MULTICAST_HASH 0x40000000
	Multicast hash match.
#define	RXS_UNICAST_HASH 0x20000000
	Unicast hash match.
#define	RXS_EXTERNAL_ADDR 0x10000000
	External address match.
#define	RXS_SA1_ADDR 0x04000000
	Specific address register 1 match.
#define	RXS_SA2_ADDR 0x02000000
	Specific address register 2 match.
#define	RXS_SA3_ADDR 0x01000000
	Specific address register 3 match.
#define	RXS_SA4_ADDR 0x00800000
	Specific address register 4 match.
#define	RXS_TYPE_ID 0x00400000
	Type ID match.
#define	RXS_VLAN_TAG 0x00200000
	VLAN tag detected.
#define	RXS_PRIORITY_TAG 0x00100000
	Priority tag detected.
#define	RXS_VLAN_PRIORITY 0x000E0000
	VLAN priority.
#define	RXS_CFI_IND 0x00010000
	Concatenation format indicator.
#define	RXS_EOF 0x00008000
	End of frame.
#define	RXS_SOF 0x00004000
	Start of frame.
#define	RXS_RBF_OFFSET 0x00003000
	Receive buffer offset mask.
#define	RXS_LENGTH_FRAME 0x000007FF
	Length of frame including FCS.
#define	TXS_USED 0x80000000
	Used buffer.
#define	TXS_WRAP 0x40000000
	Last descriptor.
#define	TXS_ERROR 0x20000000
	Retry limit exceeded.
#define	TXS_UNDERRUN 0x10000000
	Transmit underrun.
#define	TXS_NO_BUFFER 0x08000000
	Buffer exhausted.
#define	TXS_NO_CRC 0x00010000
	CRC not appended.
#define	TXS_LAST_BUFF 0x00008000
	Last buffer of frame.
Typedefs
typedef struct _EMACINFO	EMACINFO
	Network interface controller information type.
typedef struct _BufDescriptor	BufDescriptor
Functions
void	EmacRxThread (void *arg)
int	EmacOutput (NUTDEVICE dev, NETBUF nb)
	Send Ethernet packet.
int	EmacInit (NUTDEVICE *dev)
	Initialize Ethernet hardware.
Variables
NUTDEVICE	devAt91Emac
	Device information structure.

Define Documentation

#define NUT_THREAD_NICRXSTACK 768

Definition at line 97 of file at91sam7x_emac.c.

Referenced by EmacInit().

#define EMAC_RX_BUFFERS 32

Definition at line 101 of file at91sam7x_emac.c.

#define EMAC_RX_BUFSIZ 128

Definition at line 103 of file at91sam7x_emac.c.

#define EMAC_TX_BUFFERS 2

Definition at line 105 of file at91sam7x_emac.c.

#define EMAC_TX_BUFSIZ 1536

Definition at line 107 of file at91sam7x_emac.c.

#define NIC_PHY_ADDR 31

Definition at line 110 of file at91sam7x_emac.c.

#define PHY_TXCLK_ISOLATE_BIT 0

Definition at line 139 of file at91sam7x_emac.c.

#define PHY_REFCLK_XT2_BIT 0

Definition at line 140 of file at91sam7x_emac.c.

#define PHY_TXEN_BIT 1

Definition at line 141 of file at91sam7x_emac.c.

#define PHY_TXD0_BIT 2

Definition at line 142 of file at91sam7x_emac.c.

#define PHY_TXD1_BIT 3

Definition at line 143 of file at91sam7x_emac.c.

#define PHY_CRS_AD4_BIT 4

Definition at line 144 of file at91sam7x_emac.c.

#define PHY_RXD0_AD0_BIT 5

Definition at line 145 of file at91sam7x_emac.c.

#define PHY_RXD1_AD1_BIT 6

Definition at line 146 of file at91sam7x_emac.c.

#define PHY_RXER_RXD4_RPTR_BIT 7

Definition at line 147 of file at91sam7x_emac.c.

#define PHY_MDC_BIT 8

Definition at line 148 of file at91sam7x_emac.c.

#define PHY_MDIO_BIT 9

Definition at line 149 of file at91sam7x_emac.c.

#define PHY_TXD2_BIT 10

Definition at line 150 of file at91sam7x_emac.c.

#define PHY_TXD3_BIT 11

Definition at line 151 of file at91sam7x_emac.c.

#define PHY_TXER_TXD4_BIT 12

Definition at line 152 of file at91sam7x_emac.c.

#define PHY_RXD2_AD2_BIT 13

Definition at line 153 of file at91sam7x_emac.c.

#define PHY_RXD3_AD3_BIT 14

Definition at line 154 of file at91sam7x_emac.c.

#define PHY_RXDV_TESTMODE_BIT 15

Definition at line 155 of file at91sam7x_emac.c.

#define PHY_COL_RMII_BIT 16

Definition at line 156 of file at91sam7x_emac.c.

#define PHY_RXCLK_10BTSER_BIT 17

Definition at line 157 of file at91sam7x_emac.c.

#define PHY_PWRDN_BIT 18

Definition at line 158 of file at91sam7x_emac.c.

#define PHY_MDINTR_BIT 26

Definition at line 159 of file at91sam7x_emac.c.

#define PHY_MII_PINS

Value:

_BV(PHY_REFCLK_XT2_BIT) \
    | _BV(PHY_TXEN_BIT) \
    | _BV(PHY_TXD0_BIT) \
    | _BV(PHY_TXD1_BIT) \
    | _BV(PHY_CRS_AD4_BIT) \
    | _BV(PHY_RXD0_AD0_BIT) \
    | _BV(PHY_RXD1_AD1_BIT) \
    | _BV(PHY_RXER_RXD4_RPTR_BIT) \
    | _BV(PHY_MDC_BIT) \
    | _BV(PHY_MDIO_BIT) \
    | _BV(PHY_TXD2_BIT) \
    | _BV(PHY_TXD3_BIT) \
    | _BV(PHY_TXER_TXD4_BIT) \
    | _BV(PHY_RXD2_AD2_BIT) \
    | _BV(PHY_RXD3_AD3_BIT) \
    | _BV(PHY_RXDV_TESTMODE_BIT) \
    | _BV(PHY_COL_RMII_BIT) \
    | _BV(PHY_RXCLK_10BTSER_BIT)

Definition at line 161 of file at91sam7x_emac.c.

#define RXBUF_OWNERSHIP 0x00000001

Definition at line 224 of file at91sam7x_emac.c.

#define RXBUF_WRAP 0x00000002

Definition at line 225 of file at91sam7x_emac.c.

#define RXBUF_ADDRMASK 0xFFFFFFFC

Definition at line 226 of file at91sam7x_emac.c.

#define RXS_BROADCAST_ADDR 0x80000000

Broadcast address detected.

Definition at line 228 of file at91sam7x_emac.c.

#define RXS_MULTICAST_HASH 0x40000000

Multicast hash match.

Definition at line 229 of file at91sam7x_emac.c.

#define RXS_UNICAST_HASH 0x20000000

Unicast hash match.

Definition at line 230 of file at91sam7x_emac.c.

#define RXS_EXTERNAL_ADDR 0x10000000

External address match.

Definition at line 231 of file at91sam7x_emac.c.

#define RXS_SA1_ADDR 0x04000000

Specific address register 1 match.

Definition at line 232 of file at91sam7x_emac.c.

#define RXS_SA2_ADDR 0x02000000

Specific address register 2 match.

Definition at line 233 of file at91sam7x_emac.c.

#define RXS_SA3_ADDR 0x01000000

Specific address register 3 match.

Definition at line 234 of file at91sam7x_emac.c.

#define RXS_SA4_ADDR 0x00800000

Specific address register 4 match.

Definition at line 235 of file at91sam7x_emac.c.

#define RXS_TYPE_ID 0x00400000

Type ID match.

Definition at line 236 of file at91sam7x_emac.c.

#define RXS_VLAN_TAG 0x00200000

VLAN tag detected.

Definition at line 237 of file at91sam7x_emac.c.

#define RXS_PRIORITY_TAG 0x00100000

Priority tag detected.

Definition at line 238 of file at91sam7x_emac.c.

#define RXS_VLAN_PRIORITY 0x000E0000

VLAN priority.

Definition at line 239 of file at91sam7x_emac.c.

#define RXS_CFI_IND 0x00010000

Concatenation format indicator.

Definition at line 240 of file at91sam7x_emac.c.

#define RXS_EOF 0x00008000

End of frame.

Definition at line 241 of file at91sam7x_emac.c.

#define RXS_SOF 0x00004000

Start of frame.

Definition at line 242 of file at91sam7x_emac.c.

#define RXS_RBF_OFFSET 0x00003000

Receive buffer offset mask.

Definition at line 243 of file at91sam7x_emac.c.

#define RXS_LENGTH_FRAME 0x000007FF

Length of frame including FCS.

Definition at line 244 of file at91sam7x_emac.c.

#define TXS_USED 0x80000000

Used buffer.

Definition at line 246 of file at91sam7x_emac.c.

Referenced by EmacOutput().

#define TXS_WRAP 0x40000000

Last descriptor.

Definition at line 247 of file at91sam7x_emac.c.

#define TXS_ERROR 0x20000000

Retry limit exceeded.

Definition at line 248 of file at91sam7x_emac.c.

#define TXS_UNDERRUN 0x10000000

Transmit underrun.

Definition at line 249 of file at91sam7x_emac.c.

#define TXS_NO_BUFFER 0x08000000

Buffer exhausted.

Definition at line 250 of file at91sam7x_emac.c.

#define TXS_NO_CRC 0x00010000

CRC not appended.

Definition at line 251 of file at91sam7x_emac.c.

#define TXS_LAST_BUFF 0x00008000

Last buffer of frame.

Definition at line 252 of file at91sam7x_emac.c.

Typedef Documentation

typedef struct _EMACINFO EMACINFO

Network interface controller information type.

Definition at line 204 of file at91sam7x_emac.c.

typedef struct _BufDescriptor BufDescriptor

Data Structures

Defines

Typedefs

Functions

Variables

Define Documentation

Typedef Documentation